[time-nuts] our favorite topics

[KA2WEU at aol.com]

Well, i guess both statements  are correct.
 
Most of us  (Poddar and I ), and the leading Crystal Oscillator  houses ( 
Axtal, Morion and Wenzel ) and others  know the limits  imposed by the 
crystal and the semiconductor. I have several patents how to do  it better (noise 
canceling technique) but we are victims of the crystal  noise  (Operating Q 
at 100 MHz  about 70 000) and the transistors  which are getting worse  as 
the production  is aimed towards more  profit 
 
The low aging 10 MHz oscillators use 50uW at most  in the  crystal, phase 
noise not much better then -160 dB down,and the locked 100, 120,  125 and 128 
MHz Crystal oscillators with  calculated phase noise approaching -190 dBm.
 
 
The result will be to have  at lest  three custom made  transistors up to 
100 Ghz and low flicker noise.
 
One transistor for 150 MHz Oscillators, then one  400 to 2000 MHz  (SAW) 
and then finally  5000 to 40 Ghz (DRO).
 
Here you need up to 18 dBm output power, KF < 10E-10, and almost 1 W +  
dissipation .
 
The low noise large signal  AM/PM conversion circuits are not yet  fully 
understood . I am supervising 3 PhD's, one on crystal oscillators , one on  
Meta Material Structure DRO's and one on power amplifier with an additive  
noise at -170 down  relative  to the large signal input.  
 
So there is money and problems from 400 MHz to 40 Ghz, not easy ...
 
73 de Ulrich 
 
 
 
 
 
 
 
 
In a message dated 10/30/2016 11:50:20 A.M. Eastern Daylight Time,  
attila at kinali.ch writes:


That's something that has been bothering me lately: Most of  your 
publications are about the noise in UHF and GHz applications,  hardly
any for the area where most of time metrology happens: at 10MHz and  100MHz.

Is this because the sub-100MHz range oscillators are a solved  problem
and hit the physical limits of what noise optimization can do? Or  is
it because there is more money to be made in the >100MHz  range?