[time-nuts] Low cost GPS module for < 100ns timestamping error
jimlux at earthlink.net
Sun May 4 16:05:10 UTC 2014
On 5/2/14, 7:07 PM, Tony wrote:
> On 03/05/2014 02:07, Edesio Costa e Silva wrote:
>> Take a look at NavSpark from SkyTraq (http://www.skytraq.com.tw/).
>> They had
>> an Indiegogo
>> campaign recently and should deliver real soon now. The NavSpark chip
>> has an
>> trigger pin for time capture, a feature suggested by a fellow time-nut
>> and a
>> 100 MHz clock.
> Wow, that is very interesting - especially at under $18 including a
> powerful micro. Looks hard to beat, but would have preferred an ARM chip
> rather than SPARK. Can't have everything I guess!
THey probably did that because the LEON3 SPARC core is free (developed
by Jiri Gaisler and Sandi Habinc for ESTEC, originally).
I've done a lot with that SPARC: in fact I have one flying in space on
the ISS right now as a software radio (which can do GPS, as a matter of
interest). As soon as the GPS receiver software has the 1pps output,
I'll be building a sort of GPSDO (TCXO driving an NCO, with NCO phase
increment driven by corrections derived from GPS).
There's a good tool chain for the SPARC (GCC), and Aeroflex Gaisler AB
has a mailing list that provides support for questions (even if you're
using the free open source cores). Gaisler also has a huge library of
open source peripherals that you can integrate with the LEON core.
If you want FPGA testbed code and real support, beyond the bare sources
and documentation, you do need to pay for a license, but it's fairly
reasonable ($5-10k, as I recall) if you're developing a "product".
There's also a good open source RTOS available (RTEMS) if you need that;
THere's a variety of Linuxes also available for the SPARC V8, although
it's definitely not a plug and play.
It would be interesting to know what options on the LEON3 the NavSpark
implements (e.g. FPU, etc.). The LEON3 (at least in some flavors) has a
very cool debug support unit (DSU) which can do things like breakpoints
on memory access to specific locations, instruction logging on a
trigger, etc. The DSU can be accessed via serial port and/or JTAG
and/or other interfaces. It's all GDB compatible, of course.
I'd guess that writing C code for the SPARC is not much different than
writing C code for the ARM. Ditto for ASM code.
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