[time-nuts] Re: DMTD Questions

[Alex Denner]

By coincidence, I happen to be looking at one small part of your
project.  I was curious about using a DDS to do frequency offsetting
for another purpose.  In these graphs, I used the Keysight 5047A (the
AnaPico PN analyzer) cross-correlation phase noise analyzer.  I looked
at the phase noise of a free running Keysight 33522B vs the same unit
with an external reference.  Below are the two phase noise curves from
0.1 Hz to 5 MHz (10 MHz carrier).  One can see the free running 33522B
adds a decent amount of jitter if using it for a synthesized offset
generator.  I was estimating jitter by the difference in the two
integrals. (I think the graphs have 100 correlations with some spur
removal and averaging, I could try to find the details if anyone
cares.).

However, I thought of an interesting experiment: I could run an
"additive" phase noise plot of the 33522B where one channel is the
external reference and the second channel is the 33522B's (locked to
external reference) output where the output is set to be in quadrature
to the external reference entering the 5047A.  It is not really an
additive phase noise measurement in the classic sense but it may
measure the total phase noise contribution of the DDS synthesis chain.

As you know, the unreferenced HP 8663a with the OCXO is quite a bit
better---probably some combination of the OCXO, better synthesis
chain, and better power supplies, etc.  I will also include a phase
noise plot of my 8663a from 0.1 Hz to 5 Mhz at a 10 MHz carrier.

Alex


On Thu, Jul 9, 2026 at 4:42 AM Chris Hastreiter via time-nuts
<time-nuts at lists.febo.com> wrote:
>
> Time-nuts,
>
> I have been working on some modifications to Corby’s DMTD design [1] in an
> effort to further improve its noise floor and had a couple questions for
> the group.  The performance I’ve been able to achieve so far is shown in
> the below plot with the blue trace being the noise of the ProTIC counter
> itself, the pink trace being the combined noise of the counter and my zero
> crossing detector (both channels driven by a 10Hz sine wave), and the
> remaining traces the full system noise floors with 4 different offset
> oscillator options.  All noise floor measurements were taken with a carrier
> frequency of 10MHz and an offset of 10Hz.  I believe that much of the noise
> floor degradation at long tau is due to thermal effects in the first stage
> amplifier of the ZCD as I haven’t yet gotten the system installed into an
> enclosure and I can worsen the issue by thermally disturbing the LT1028 of
> the first stage.
>
> [image: image.png]
>
> My first question is in relation to mixer noise which is a noise source
> that I have not yet considered.  I am using the same SBL-1 mixer as Corby’s
> original design but [2] implies that some mixers exhibit lower flicker
> phase modulation than others and I haven’t seen any literature or
> specifications that point to any devices other than the 10514A in that
> paper.  They also discuss adding capacitive loading to the mixer to further
> reduce noise referencing another paper that I have yet to be able to find.
> Is there any expectation that changing to a mixer different than the SBL-1
> will improve my results and should I consider capacitive loading on the
> mixer?  If so, how would I determine an appropriate amount of capacitive
> loading?  I currently have it loaded with a bridged-T filter holding 50
> Ohms of impedance across the frequency spectrum.
>
>
>
> My second question is in regard to the common oscillator noise
> contribution, specifically for the use case of a synthesized offset
> oscillator.  The below plot shows the results I’ve gotten so far with some
> sources that I already have, and as can be seen the system noise floor
> degrades much faster with the synthesized offset than with the 10811A.
> However, it would be advantageous for me to be able to use a synthesized
> offset for tests where the DUTs differ slightly in frequency and the system
> will phase wrap.  The reason for this is that when using a free-running
> oscillator the phase wraps are very difficult to remove automatically
> because the divided phase wrap will differ from the expected with any
> frequency error in the offset oscillator.  Do you have any suggestions for
> synthesizers or other offset techniques that would help with this?  Using a
> 10811A and a slow PLL as a cleanup loop on the synthesizer does appear to
> work well in the below plot, but looking at the first plot in this email at
> least in my initial implementation there seems to be some low frequency
> oscillation in the PLL impacting the noise floor.  I’ve also included a
> plot showing measurements I’ve taken of the residual noise for the two
> synthesizers used as well as a comparison of two of the 10811A oscillators
> that I’m using.
>
> [image: image.png]
>
> [image: image.png]
>
> [1] https://www.eevblog.com/forum/metrology/dmtd-board/
>
> [2] https://ieeexplore.ieee.org/document/5075023
>
>
>
> Thanks,
>
>
>
> Chris
> _______________________________________________
> time-nuts mailing list -- time-nuts at lists.febo.com
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